A PFD and Charge Pump Switching Circuit to Optimize the Output Phase Noise of the PLL in 90 nm CMOS

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VLSI BACKEND PROJECT ----- IEEE-2015

This project presents the design of a novel Phase Frequency Detector (PFD) and Charge Pump (CP) switching circuits for the frequency synthesizer in phase-locked loop (PLL). Our proposed PFD technique can eliminate the effect of missing edge and phase ambiguity problems in conventional PFDs circuit. Also, a novel CP circuit with a special switching scheme has been incorporated to reduce the current mismatch error and charge injection error problem with this new design technique.

                                                                    

Design and Analysis of an Adaptively Biased Low Dropout Regulator Using Enhanced Current Mirror Buffer

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VLSI BACKEND PROJECT------- IEEE-2015

This project presents an adaptively biased, low dropout regulator (AB-LDR) using an enhanced current mirror (ECM) buffer for effectively driving the gate of the PMOS power transistor. The proposed ECM buffer offers very low output impedance which pushes out the pole at the gate of the PMOS power transistor to improve the stability.

                                                                

Analysis and Design of Dual-Mode CMOS LC-VCOs

VLSI BACKEND PROJECT ------- IEEE-2015

We present a nonlinear analysis of the basic circuit of a dual-band voltage controlled oscillator (VCO), composed by an active one-port and by a double-tuned LC circuit. Both the frequencies

and the amplitudes of the two modes of sinusoidal oscillation are calculated by closed-form expressions

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A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply Rejection

VLSI BACKEND PROJECT------- IEEE-2015
A fully-integrated low-dropout regulator (LDO) with fast transient response and full spectrum power supply rejection (PSR) is proposed to provide a clean supply for noise-sensitive building blocks in wideband communication systems. In comparison to other fully-integrated designs, the output pole is set to be the dominant pole, and the internal poles are pushed to higher frequencies with only 50mA of total quiescent current. For a 1.2V input voltage and 1V output voltage.


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               Design of Improved Performance Voltage Controlled Ring Oscillator

                        VLSI BACKEND PROJECT ----  IEEE-2015

This paper presents a new technique to improve the performance of ring oscillator. The VCO is based on single ended ring oscillator. The circuit is designed using 90 nm CMOS technology with supply voltage of 3.3 V. A VCO with high frequency range.

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Swarm Intelligence for Detecting Interesting Events in Crowded Environments

IEEE TRANSACTIONS PAPER-2015 ON MATLAB IMAGE PROCESSING

This project focuses on detecting and localizing anomalous events in video frames of crowded scenes. Both motion and appearance information are considered. A newly introduced concept based on swarm theory, pyramid histograms of oriented swarms (PHOS), is applied to capture the dynamics of crowded environments. PHOS, together with the well-known pyramid histograms of oriented gradients, are combined to build a descriptor that effectively characterizes each scene.

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DATA ENCODING TECHNIQUES FOR REDUCING ENERGY

CONSUMPTION IN NETWORK-ON-CHIP

IEEE TRANSACTIONS-2014

The main aim of this project is to reduce the power dissipation in the links of the NoC by decreasing the linear switching and the coupling switching activities by using the data encoding techniques.

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